90 avr_regbit_t spr[4]
clock divider
Definition: avr_spi.h:57
avr_regbit_t disabled
bit in the PRR
Definition: avr_spi.h:49
avr_regbit_t spe
spi enable
Definition: avr_spi.h:55
char name
Definition: avr_spi.h:48
uint16_t avr_io_addr_t
Definition: sim_avr_types.h:37
avr_io_addr_t r_spdr
data register
Definition: avr_spi.h:51
avr_io_addr_t r_spsr
status register
Definition: avr_spi.h:53
avr_t * avr
Definition: run_avr.c:54
interrupt vector for the IO modules
Definition: sim_interrupts.h:37
This 'structure' is a packed representation of an IO register 'bit' (or consecutive bits)...
Definition: sim_avr_types.h:47
avr_int_vector_t spi
spi interrupt
Definition: avr_spi.h:59
struct avr_spi_t avr_spi_t
avr_io_addr_t r_spcr
control register
Definition: avr_spi.h:52
uint8_t input_data_register
Definition: avr_spi.h:61
avr_io_t io
Definition: avr_spi.h:47
void avr_spi_init(avr_t *avr, avr_spi_t *port)
Definition: avr_spi.c:106
Main AVR instance.
Definition: sim_avr.h:142
IO module base struct Modules uses that as their first member in their own struct.
Definition: sim_io.h:42
avr_regbit_t mstr
master/slave
Definition: avr_spi.h:56