SimAVR
AVR Simulator
avr_watchdog.h
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1 /*
2  * avr_watchdog.h
3  *
4  * Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
5  *
6  * This file is part of simavr.
7  *
8  * simavr is free software: you can redistribute it and/or modify it under the terms of the GNU
9  * General Public License as published by the Free Software Foundation, either version 3 of the
10  * License, or (at your option) any later version.
11  *
12  * simavr is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even
13  * the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
14  * Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License along with simavr. If not, see
17  * <http://www.gnu.org/licenses/>.
18  */
19 
25 #ifndef __AVR_WATCHDOG_H___
26 #define __AVR_WATCHDOG_H___
27 
28 #ifdef __cplusplus
29 extern "C"
30 {
31 #endif
32 
33 #include "sim_avr.h"
34 
35  typedef struct avr_watchdog_t
36  {
38 
40 
44 
46 
48 
49  struct
50  {
51  uint8_t wdrf;
53  } reset_context;
55 
56  /* takes no parameter */
57 #define AVR_IOCTL_WATCHDOG_RESET AVR_IOCTL_DEF('w','d','t','r')
58 
60 
66 #define AVR_WATCHDOG_DECLARE(_WDSR, _vec) \
67  .watchdog = { \
68  .wdrf = AVR_IO_REGBIT(MCUSR, WDRF), \
69  .wdce = AVR_IO_REGBIT(_WDSR, WDCE), \
70  .wde = AVR_IO_REGBIT(_WDSR, WDE), \
71  .wdp = { AVR_IO_REGBIT(_WDSR, WDP0),AVR_IO_REGBIT(_WDSR, WDP1), \
72  AVR_IO_REGBIT(_WDSR, WDP2),AVR_IO_REGBIT(_WDSR, WDP3) }, \
73  .watchdog = { \
74  .enable = AVR_IO_REGBIT(_WDSR, WDIE), \
75  .raised = AVR_IO_REGBIT(_WDSR, WDIF), \
76  .vector = _vec, \
77  }, \
78  }
79 
80  /* no WDP3, WDIE, WDIF in atmega128 */
81  /* MCUSR is called MCUCSR in atmega128 */
82 #define AVR_WATCHDOG_DECLARE_128(_WDSR, _vec) \
83  .watchdog = { \
84  .wdrf = AVR_IO_REGBIT(MCUCSR, WDRF), \
85  .wdce = AVR_IO_REGBIT(_WDSR, WDCE), \
86  .wde = AVR_IO_REGBIT(_WDSR, WDE), \
87  .wdp = { AVR_IO_REGBIT(_WDSR, WDP0),AVR_IO_REGBIT(_WDSR, WDP1), \
88  AVR_IO_REGBIT(_WDSR, WDP2) }, \
89  .watchdog = { \
90  .enable = AVR_IO_REGBIT(_WDSR, 6), \
91  .raised = AVR_IO_REGBIT(_WDSR, 7), \
92  .vector = _vec, \
93  }, \
94  }
95 
96 #ifdef __cplusplus
97 };
98 #endif
99 
100 #endif /* __AVR_WATCHDOG_H___ */
101 
avr_regbit_t wdp[4]
watchdog Timer Prescaler
Definition: avr_watchdog.h:43
Definition: avr_watchdog.h:35
avr_t * avr
Definition: run_avr.c:54
struct avr_watchdog_t avr_watchdog_t
interrupt vector for the IO modules
Definition: sim_interrupts.h:37
This 'structure' is a packed representation of an IO register 'bit' (or consecutive bits)...
Definition: sim_avr_types.h:47
struct avr_watchdog_t::@21 reset_context
avr_regbit_t wdrf
watchdog reset flag (in MCU Status Register)
Definition: avr_watchdog.h:39
void(* avr_run_t)(struct avr_t *avr)
Definition: sim_avr.h:137
avr_regbit_t wdce
watchdog change enable
Definition: avr_watchdog.h:41
uint64_t avr_cycle_count_t
Definition: sim_avr_types.h:36
avr_cycle_count_t cycle_count
Definition: avr_watchdog.h:47
avr_regbit_t wde
watchdog enabled
Definition: avr_watchdog.h:42
uint8_t wdrf
saved watchdog reset flag
Definition: avr_watchdog.h:51
avr_run_t avr_run
restored during reset
Definition: avr_watchdog.h:52
avr_io_t io
Definition: avr_watchdog.h:37
void avr_watchdog_init(avr_t *avr, avr_watchdog_t *p)
Definition: avr_watchdog.c:221
Main AVR instance.
Definition: sim_avr.h:142
IO module base struct Modules uses that as their first member in their own struct.
Definition: sim_io.h:42
avr_int_vector_t watchdog
watchdog interrupt
Definition: avr_watchdog.h:45