SimAVR
AVR Simulator
sim_regbit.h
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1 /*
2  * sim_regbit.h
3  *
4  * Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
5  *
6  * This file is part of simavr.
7  *
8  * simavr is free software: you can redistribute it and/or modify it under the terms of the GNU
9  * General Public License as published by the Free Software Foundation, either version 3 of the
10  * License, or (at your option) any later version.
11  *
12  * simavr is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even
13  * the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
14  * Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License along with simavr. If not, see
17  * <http://www.gnu.org/licenses/>.
18  */
19 
31 #ifndef __SIM_REGBIT_H__
32 #define __SIM_REGBIT_H__
33 
34 #include "sim_avr.h"
35 
36 #ifdef __cplusplus
37 extern "C"
38 {
39 #endif
40 
41 #define ARRAY_SIZE(_aa) \
42  (sizeof(_aa) / sizeof((_aa)[0]))
43 
45  static inline uint8_t avr_regbit_set (avr_t * avr, avr_regbit_t rb)
46  {
47  uint16_t a = rb.reg;
48  uint8_t m;
49 
50  if (!a)
51  return 0;
52  m = rb.mask << rb.bit;
53  avr_core_watch_write (avr, a, avr->data[a] | m);
54  return (avr->data[a] >> rb.bit) & rb.mask;
55  }
56 
57  static inline uint8_t avr_regbit_setto (avr_t * avr, avr_regbit_t rb, uint8_t v)
58  {
59  uint16_t a = rb.reg;
60  uint8_t m;
61 
62  if (!a)
63  return 0;
64  m = rb.mask << rb.bit;
65  avr_core_watch_write (avr, a, (avr->data[a] & ~(m)) | ((v << rb.bit) & m));
66  return (avr->data[a] >> rb.bit) & rb.mask;
67  }
68 
70  static inline uint8_t avr_regbit_setto_raw (avr_t * avr, avr_regbit_t rb, uint8_t v)
71  {
72  uint16_t a = rb.reg;
73  uint8_t m;
74 
75  if (!a)
76  return 0;
77  m = rb.mask << rb.bit;
78  avr_core_watch_write (avr, a, (avr->data[a] & ~(m)) | ((v) & m));
79  return (avr->data[a]) & (rb.mask << rb.bit);
80  }
81 
82  static inline uint8_t avr_regbit_get (avr_t * avr, avr_regbit_t rb)
83  {
84  uint16_t a = rb.reg;
85  if (!a)
86  return 0;
87  //uint8_t m = rb.mask << rb.bit;
88  return (avr->data[a] >> rb.bit) & rb.mask;
89  }
90 
93  static inline uint8_t avr_regbit_from_value (avr_t * avr, avr_regbit_t rb, uint8_t value)
94  {
95  uint16_t a = rb.reg;
96  if (!a)
97  return 0;
98  return (value >> rb.bit) & rb.mask;
99  }
100 
102  static inline uint8_t avr_regbit_get_raw (avr_t * avr, avr_regbit_t rb)
103  {
104  uint16_t a = rb.reg;
105  if (!a)
106  return 0;
107  // uint8_t m = rb.mask << rb.bit;
108  return (avr->data[a]) & (rb.mask << rb.bit);
109  }
110 
111  static inline uint8_t avr_regbit_clear (avr_t * avr, avr_regbit_t rb)
112  {
113  uint16_t a = rb.reg;
114  uint8_t m = rb.mask << rb.bit;
115  avr_core_watch_write (avr, a, avr->data[a] & ~m);
116  return avr->data[a];
117  }
118 
122  static inline uint8_t avr_regbit_get_array (avr_t * avr, avr_regbit_t * rb, int count)
123  {
124  uint8_t res = 0;
125  int i;
126 
127  for (i = 0; i < count; i++, rb++)
128  if (rb->reg)
129  {
130  uint16_t a = rb->reg;
131  res |= ((avr->data[a] >> rb->bit) & rb->mask) << i;
132  }
133  return res;
134  }
135 
138  avr_regbit_t * rb,
139  uint8_t count, uint8_t value)
140  {
141  int i;
142  for (i = 0; i < count; i++, rb++)
143  if (rb->reg)
144  {
145  uint8_t rbv = (value >> (count - i)) & 1;
146  avr_regbit_setto (avr, *rb, rbv);
147  }
148  }
149 
150 #define AVR_IO_REGBIT(_io, _bit) \
151  { . reg = (_io), .bit = (_bit), .mask = 1 }
152 
153 #define AVR_IO_REGBITS(_io, _bit, _mask) \
154  { . reg = (_io), .bit = (_bit), .mask = (_mask) }
155 
156 #ifdef __cplusplus
157 };
158 #endif
159 
160 #endif /* __SIM_REGBIT_H__ */
161 
static uint8_t avr_regbit_setto_raw(avr_t *avr, avr_regbit_t rb, uint8_t v)
Set the 'raw' bits, if 'v' is the unshifted value of the bits.
Definition: sim_regbit.h:70
uint32_t reg
Definition: sim_avr_types.h:49
uint8_t * data
SRAM memory, starting by the general purpose registers, and IO registers.
Definition: sim_avr.h:265
avr_t * avr
Definition: run_avr.c:54
static uint8_t avr_regbit_get_raw(avr_t *avr, avr_regbit_t rb)
Return the bit(s) 'in position' instead of zero based.
Definition: sim_regbit.h:102
uint32_t bit
Definition: sim_avr_types.h:49
This 'structure' is a packed representation of an IO register 'bit' (or consecutive bits)...
Definition: sim_avr_types.h:47
static void avr_regbit_set_array_from_value(avr_t *avr, avr_regbit_t *rb, uint8_t count, uint8_t value)
Does the reverse of avr_regbit_get_array.
Definition: sim_regbit.h:137
static uint8_t avr_regbit_get(avr_t *avr, avr_regbit_t rb)
Definition: sim_regbit.h:82
uint32_t mask
Definition: sim_avr_types.h:49
static uint8_t avr_regbit_clear(avr_t *avr, avr_regbit_t rb)
Definition: sim_regbit.h:111
static uint8_t avr_regbit_from_value(avr_t *avr, avr_regbit_t rb, uint8_t value)
Using regbit from value eliminates some of the set to test then clear register operations.
Definition: sim_regbit.h:93
static uint8_t avr_regbit_set(avr_t *avr, avr_regbit_t rb)
Set/get/clear io register bits in one operation.
Definition: sim_regbit.h:45
static uint8_t avr_regbit_setto(avr_t *avr, avr_regbit_t rb, uint8_t v)
Definition: sim_regbit.h:57
Main AVR instance.
Definition: sim_avr.h:142
static uint8_t avr_regbit_get_array(avr_t *avr, avr_regbit_t *rb, int count)
This reads the bits for an array of avr_regbit_t, make up a "byte" with them.
Definition: sim_regbit.h:122
void avr_core_watch_write(avr_t *avr, uint16_t addr, uint8_t v)
These are accessors for avr->data but allows watchpoints to be set for gdb IO modules use that to set...
Definition: sim_core.c:156