|
SimAVR
AVR Simulator
|
SPI Module initialization and state structure. More...
#include <avr_bitbang.h>

Data Fields | |
| avr_t * | avr |
| avr we are attached to More... | |
| uint8_t | enabled |
| bit-bang enabled flag More... | |
| uint8_t | clk_generate |
| generate clock and write to clock pin (if available) -> master / slave mode More... | |
| uint8_t | clk_pol |
| clock polarity, base (inactive) value of clock More... | |
| uint8_t | clk_phase |
| clock phase / data sampling edge More... | |
| uint32_t | clk_cycles |
| cycles per clock period - must be multiple of 2! (used if clk_generate is enabled) More... | |
| uint8_t | data_order |
| data order / shift More... | |
| uint8_t | buffer_size |
| size of buffer in bits (1...32) More... | |
| void * | callback_param |
| void(* | callback_bit_read )(uint8_t bit, void *param) |
| anonymous parameter for callback functions More... | |
| void(* | callback_bit_write )(uint8_t bit, void *param) |
| callback function to notify about bit write More... | |
| uint32_t(* | callback_transfer_finished )(uint32_t data, void *param) |
| callback function to notify about a complete transfer (read received data and write new output data) More... | |
| avr_iopin_t | p_clk |
| clock pin (optional) More... | |
| avr_iopin_t | p_in |
| data in pin More... | |
| avr_iopin_t | p_out |
| data out pin More... | |
| uint32_t | data |
| data buffer More... | |
| int8_t | clk_count |
| internal clock edge count More... | |
SPI Module initialization and state structure.
| avr_t* avr |
avr we are attached to
| uint8_t buffer_size |
size of buffer in bits (1...32)
| void(* callback_bit_read) (uint8_t bit, void *param) |
anonymous parameter for callback functions
callback function to notify about bit read
| void(* callback_bit_write) (uint8_t bit, void *param) |
callback function to notify about bit write
| void* callback_param |
| uint32_t(* callback_transfer_finished) (uint32_t data, void *param) |
callback function to notify about a complete transfer (read received data and write new output data)
| int8_t clk_count |
internal clock edge count
| uint32_t clk_cycles |
cycles per clock period - must be multiple of 2! (used if clk_generate is enabled)
| uint8_t clk_generate |
generate clock and write to clock pin (if available) -> master / slave mode
| uint8_t clk_phase |
clock phase / data sampling edge
| uint8_t clk_pol |
clock polarity, base (inactive) value of clock
| uint32_t data |
data buffer
| uint8_t data_order |
data order / shift
| uint8_t enabled |
bit-bang enabled flag
| avr_iopin_t p_clk |
clock pin (optional)
| avr_iopin_t p_in |
data in pin
| avr_iopin_t p_out |
data out pin