- Module avr_bitbang
- one input and one output pin (can be the same HW pin for I2C)
- one clock pin which can be configured as input or output when the clock is output, the clock signal is generated with a configured frequency (master / slave mode)
- 2x 32-bit buffers (input / output) (allows start, stop bits for UART, etc.)
- on each read / write a callback is executed to notify the master module
- globalScope> Global avr_bitbang_start (avr_bitbang_t *p)
- test
- globalScope> Global BITBANG_MASK
- refactor SPI to bitbang